Merlin, Itay ; Zambrano, Benjamin ; Lanuzza, Marco et al. / SpaceCAM : A 16nm FinFET low-power soft-error tolerant TCAM design for space communication applications. In: IEEE Access. 2025.
Cohen, Eldar ; Yavits, Leonid ; Zaidel, Benjamin M. et al. / CoNfasTT : A Configurable, Scalable, and Fast Dual Mode Logic-Based NTT Design. In: IEEE Access. 2024 ; Vol. 12. pp. 150486-150501.
Garzon, Esteban ; Hanhan, Robert ; Lanuzza, Marco et al. / FASTA : Revisiting Fully Associative Memories in Computer Microarchitecture. In: IEEE Access. 2024 ; Vol. 12. pp. 13923-13943.
Shavit, Netanel ; Stanger, Inbal ; Taco, Ramiro et al. / Low Power, Energy Efficient and High Performance Triple Mode Logic for IoT Applications. 2024 19th Conference on Ph.D Research in Microelectronics and Electronics, PRIME 2024. Institute of Electrical and Electronics Engineers Inc., 2024. (2024 19th Conference on Ph.D Research in Microelectronics and Electronics, PRIME 2024).
Jahshan, Zuher ; Merlin, Itay ; Garzón, Esteban et al. / DASH-CAM : Dynamic Approximate SearcH Content Addressable Memory for genome classification. Proceedings of the 56th Annual IEEE/ACM International Symposium on Microarchitecture, MICRO 2023. Association for Computing Machinery, Inc, 2023. pp. 1453-1465 (Proceedings of the 56th Annual IEEE/ACM International Symposium on Microarchitecture, MICRO 2023).
Garzon, Esteban ; Lanuzza, Marco ; Teman, Adam et al. / AM4 : MRAM Crossbar Based CAM/TCAM/ACAM/AP for In-Memory Computing. In: IEEE Journal on Emerging and Selected Topics in Circuits and Systems. 2023 ; Vol. 13, No. 1. pp. 408-421.
Garzon, Esteban ; Yavits, Leonid ; Teman, Adam et al. / STT-MRAM Technology For Energy-Efficient Cryogenic Memory Applications. LASCAS 2023 - 14th IEEE Latin American Symposium on Circuits and Systems, Proceedings. editor / Monica Karel Huerta. Institute of Electrical and Electronics Engineers Inc., 2023. (LASCAS 2023 - 14th IEEE Latin American Symposium on Circuits and Systems, Proceedings).
Yavits, Leonid. / Will computing in memory become a new dawn of associative processors?. In: Memories - Materials, Devices, Circuits and Systems. 2023 ; Vol. 4.
Garzon, Esteban ; Golman, Roman ; Lanuzza, Marco et al. / A Low-Complexity Sensing Scheme for Approximate Matching Content-Addressable Memory. In: IEEE Transactions on Circuits and Systems II: Express Briefs. 2023 ; Vol. 70, No. 10. pp. 3867-3871.
Garzón, Esteban ; Yavits, Leonid ; Lanuzza, Marco et al. / Emerging Memory Structures for VLSI Circuits. Wiley Encyclopedia of Electrical and Electronics Engineering. Chichester, England, UK : John Wiley & Sons, Ltd, 2022. pp. 1-28
Hanhan, Robert ; Garzón, Esteban ; Jahshan, Zuher et al. / EDAM : Edit Distance tolerant Approximate Matching content addressable memory. ISCA 2022 - Proceedings of the 49th Annual International Symposium on Computer Architecture. Institute of Electrical and Electronics Engineers Inc., 2022. pp. 495-507 (Proceedings - International Symposium on Computer Architecture).
Khalifa, Marcel ; Ben-Hur, Rotem ; Ronen, Ronny et al. / FiltPIM : In-Memory Filter for DNA Sequencing. 2021 28th IEEE International Conference on Electronics, Circuits, and Systems, ICECS 2021 - Proceedings. Institute of Electrical and Electronics Engineers Inc., 2021. (2021 28th IEEE International Conference on Electronics, Circuits, and Systems, ICECS 2021 - Proceedings).
Stanger, Inbal ; Shavit, Netanel ; Taco, Ramiro et al. / Robust dual mode pass logic (DMPL) for energy efficiency and high performance. 2020 IEEE International Symposium on Circuits and Systems, ISCAS 2020 - Proceedings. Institute of Electrical and Electronics Engineers Inc., 2020. (Proceedings - IEEE International Symposium on Circuits and Systems).
Kaplan, Roman ; Yavits, Leonid ; Ginosasr, Ran. / BioSEAL : In-Memory Biological Sequence Alignment Accelerator for Large-Scale Genomic Data. SYSTOR 2020 - Proceedings of the 13th ACM International Systems and Storage Conference. Association for Computing Machinery, 2020. pp. 36-48 (SYSTOR 2020 - Proceedings of the 13th ACM International Systems and Storage Conference).
Taco, Ramiro ; Yavits, Leonid ; Shavit, Netanel et al. / Exploiting single-well design for energy-efficient ultra-wide voltage range Dual Mode Logic -based digital circuits in 28nm FD-SOI technology. 2020 IEEE International Symposium on Circuits and Systems, ISCAS 2020 - Proceedings. Institute of Electrical and Electronics Engineers Inc., 2020. (Proceedings - IEEE International Symposium on Circuits and Systems).
Yavits, Leonid ; Taco, Ramiro ; Shavit, Netanel et al. / Dual mode logic address decoder. 2020 IEEE International Symposium on Circuits and Systems, ISCAS 2020 - Proceedings. Institute of Electrical and Electronics Engineers Inc., 2020. (Proceedings - IEEE International Symposium on Circuits and Systems).
Yavits, Leonid ; Orosa, Lois ; Mahar, Suyash et al. / WoLFRaM : Enhancing Wear-Leveling and Fault Tolerance in Resistive Memories using Programmable Address Decoders. Proceedings - 2020 IEEE 38th International Conference on Computer Design, ICCD 2020. Institute of Electrical and Electronics Engineers Inc., 2020. pp. 187-196 (Proceedings - IEEE International Conference on Computer Design: VLSI in Computers and Processors).
Yavits, Leonid ; Kaplan, Roman ; Ginosar, Ran. / Giraf : General purpose in-storage resistive associative framework. Proceedings - 2019 28th International Conference on Parallel Architectures and Compilation Techniques, PACT 2019. Institute of Electrical and Electronics Engineers Inc., 2019. pp. 476-477 (Parallel Architectures and Compilation Techniques - Conference Proceedings, PACT).
Kaplan, Roman ; Yavits, Leonid ; Ginosar, Ran. / POSTER : BioSEAL: In-memory biological sequence alignment accelerator for large-scale genomic data. Proceedings - 2019 28th International Conference on Parallel Architectures and Compilation Techniques, PACT 2019. Institute of Electrical and Electronics Engineers Inc., 2019. pp. 458-459 (Parallel Architectures and Compilation Techniques - Conference Proceedings, PACT).
Yavits, Leonid (Inventor) ; Ginosar, Ran (Inventor) ; Weiser, Uri (Inventor) et al. / Resistive address decoder and virtually addressed memory. Feb 13, 2018.
Kaplan, Roman ; Yavits, Leonid ; Ginosar, Ran et al. / A Resistive CAM Processing-in-Storage Architecture for DNA Sequence Alignment. In: IEEE Micro. 2017 ; Vol. 37, No. 4. pp. 20-28.
Kaplan, Roman ; Yavits, Leonid ; Ginosar, Ran. / From processing-in-memory to processing-in-storage. In: Supercomputing Frontiers and Innovations. 2017 ; Vol. 4, No. 3. pp. 99-116.
Kaplan, R. ; Yavits, L. ; Morad, A. et al. / Deduplication in resistive content addressable memory based solid state drive. Proceedings - 2016 26th International Workshop on Power and Timing Modeling, Optimization and Simulation, PATMOS 2016. Institute of Electrical and Electronics Engineers Inc., 2017. pp. 100-106 (Proceedings - 2016 26th International Workshop on Power and Timing Modeling, Optimization and Simulation, PATMOS 2016).
Morad, Amir ; Yavits, Leonid ; Kvatinsky, Shahar et al. / Resistive GP-SIMD processing-in-memory. In: ACM Transactions on Architecture and Code Optimization. 2016 ; Vol. 12, No. 4.
Yavits, L. ; Morad, A. ; Ginosar, R. / The Effect of Temperature on Amdahl Law in 3D Multicore Era. In: IEEE Transactions on Computers. 2016 ; Vol. 65, No. 6. pp. 2010-2013.
Yavits, L. ; Morad, A. ; Ginosar, R. / Sparse Matrix Multiplication on An Associative Processor. In: IEEE Transactions on Parallel and Distributed Systems. 2015 ; Vol. 26, No. 11. pp. 3175-3183.
Morad, Amir ; Yavits, Leonid ; Ginosar, Ran. / Efficient dense and sparse matrix multiplication on GP-SIMD. 2014 24th International Workshop on Power and Timing Modeling, Optimization and Simulation, PATMOS 2014. Institute of Electrical and Electronics Engineers Inc., 2014. (2014 24th International Workshop on Power and Timing Modeling, Optimization and Simulation, PATMOS 2014).
Morad, Amir ; Yavits, Leonid ; Ginosar, Ran. / Convex optimization of resource allocation in asymmetric and heterogeneous SoC. 2014 24th International Workshop on Power and Timing Modeling, Optimization and Simulation, PATMOS 2014. Institute of Electrical and Electronics Engineers Inc., 2014. (2014 24th International Workshop on Power and Timing Modeling, Optimization and Simulation, PATMOS 2014).
Yavits, L. ; Morad, A. ; Ginosar, R. / The effect of communication and synchronization on Amdahl's law in multicore systems. In: Parallel Computing. 2014 ; Vol. 40, No. 1. pp. 1-16.
Yavits, Leonid ; Morad, Amir ; Ginosar, Ran. / 3D cache hierarchy optimization. 2013 IEEE International 3D Systems Integration Conference, 3DIC 2013. 2013. (2013 IEEE International 3D Systems Integration Conference, 3DIC 2013).
Morad, Tomer Yosef (Inventor) ; Yavits, Leonid (Inventor) ; Morad, Amir (Inventor) et al. / Automotive entertainment, communication, navigation and control center. Jan 19, 2009.
Yavits, Leonid (Inventor) ; Morad, Amir (Inventor) ; Corp, Broadcom (Inventor). / Video encoding and video/audio/data multiplexing device. May 13, 2008.
Morad, Amir (Inventor) ; Yavits, Leonid (Inventor) ; Dimnik, Ilan (Inventor) et al. / Method and apparatus for video pixel interpolation. Jan 22, 2007.
Yavits, Leonid (Inventor) ; Morad, Amir (Inventor) ; Corp, Broadcom (Inventor). / Video encoding and video/audio/data multiplexing device. Jun 14, 2006.
Morad, Amir (Inventor) ; Yavits, Leonid (Inventor) ; Oxman, Gedalia (Inventor) et al. / Integrated circuit, an encoder/decoder architecture, and a method for processing a media stream. Nov 22, 2006.
Morad, Amir (Inventor) ; Yavits, Leonid (Inventor) ; Oxman, Gadi (Inventor) et al. / SYSTEM AND METHOD FOR MULTI-CHANNEL VIDEO AND AUDIO ENCODING ON A SINGLE CHIP. Patent No.: EP1430706. Jun 23, 2004.
Morad, Amir (Inventor) ; Yavits, Leonid (Inventor) ; Oxman, Gadi (Inventor) et al. / System and method for video and audio encoding on a single chip. Feb 10, 2004.
Morad, Amir (Inventor) ; Yavits, Leonid (Inventor) ; Oxman, Gadi (Inventor) et al. / System and method for video and audio encoding on a single chip. Jun 11, 2002.