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My Publications

2026

Levi, Yaniv ; Harel, Odem ; Teman, Adam et al. / GainP : A Gain Cell Embedded DRAM-based associative in-memory processor. In: Journal of Systems Architecture. 2026 ; Vol. 172.
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Garzón, Esteban ; Fish, Alexander ; Yavits, Leonid. / CADM : Content addressable commodity off-the-shelf DRAM-based genome classifier. In: Journal of Systems Architecture. 2026 ; Vol. 174.
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Garzón, Esteban ; Galindo, Victor ; Harary, Yuval et al. / Integrated BSI bacteria identifier-on-chip using approximate k-mer matching. In: Scientific Reports. 2026 ; Vol. 16, No. 1.
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Garzón, Esteban ; Zambrano, Benjamin ; Sheinenzon, David et al. / SPARCAM : Sparse matrix multiplication accelerator using multi-port dynamic CAM. In: Journal of Systems Architecture. 2026 ; Vol. 174.
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Bromot, Daria ; Kra, Yehuda ; Jahshan, Zuher et al. / GenMClass : Design and comparative analysis of genome classifier-on-chip platform. In: Journal of Systems Architecture. 2026 ; Vol. 173.
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Simon, William Andrew ; Yavits, Leonid ; Koliogeorgi, Konstantina et al. / Processing-in-memory for genomics workloads. In: IEEE Micro. 2026.
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2025

Harary, Yuval ; Snapir, Paz ; Tov, Shir Siman et al. / GCOC : A Genome Classifier-On-Chip Based on Similarity Search Content Addressable Memory. In: IEEE Transactions on Biomedical Circuits and Systems. 2025 ; Vol. 19, No. 3. pp. 484-495.
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Taco, Ramiro ; Garzón, Esteban ; Teman, Adam et al. / Towards Low-Power High-Performance Content-Addressable Memory : A Robust Precharge-Free Approach. ISCAS 2025 - IEEE International Symposium on Circuits and Systems, Proceedings. Institute of Electrical and Electronics Engineers Inc., 2025. (Proceedings - IEEE International Symposium on Circuits and Systems).
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Garzón, Esteban ; Rechef, Eyal ; Golman, Roman et al. / A 128-kbit Approximate Search-Capable Content-Addressable Memory (CAM) With Tunable Hamming Distance. In: IEEE Journal of Solid-State Circuits. 2025 ; Vol. 60, No. 8. pp. 3009-3019.
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Jahshan, Zuher ; Merlin, Itay ; Garzon, Esteban et al. / CAM4 : In-Memory Viral Pathogen Genome Classification Using Similarity Search Dynamic Content-Addressable Memory. In: IEEE Transactions on Emerging Topics in Computing. 2025 ; Vol. 13, No. 4. pp. 1341-1355.
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Merlin, Itay ; Zambrano, Benjamin ; Lanuzza, Marco et al. / SpaceCAM : A 16 nm FinFET Low-Power Soft-Error Tolerant TCAM Design for Space Communication Applications. In: IEEE Access. 2025 ; Vol. 13. pp. 12032-12043.
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2024

Jahshan, Zuher ; Garzon, Esteban ; Yavits, Leonid. / ViRAL : Vision Transformer Based Accelerator for ReAL Time Lineage Assignment of Viral Pathogens. In: IEEE Access. 2024 ; Vol. 12. pp. 28353-28368.
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Merlin, Itay ; Garzon, Esteban ; Fish, Alex et al. / DIPER : Detection and Identification of Pathogens Using Edit Distance-Tolerant Resistive CAM. In: IEEE Transactions on Computers. 2024 ; Vol. 73, No. 10. pp. 2463-2473.
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Garzon, Esteban ; Bedoya, Alessandro ; Lanuzza, Marco et al. / Monolithic 3-D-Based Nonvolatile Associative Processor for High-Performance Energy-Efficient Computations. In: IEEE Journal on Exploratory Solid-State Computational Devices and Circuits. 2024 ; Vol. 10. pp. 40-48.
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Cohen, Eldar ; Yavits, Leonid ; Zaidel, Benjamin M. et al. / CoNfasTT : A Configurable, Scalable, and Fast Dual Mode Logic-Based NTT Design. In: IEEE Access. 2024 ; Vol. 12. pp. 150486-150501.
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Harary, Yuval ; Snapir, Paz ; Reshef, Eyal et al. / OCCAM : An Error Oblivious CAM. In: IEEE Solid-State Circuits Letters. 2024 ; Vol. 7. pp. 82-85.
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Jahshan, Z. ; Yavits, L. / MajorK : Majority Based kmer Matching in Commodity DRAM. In: IEEE Computer Architecture Letters. 2024 ; Vol. 23, No. 1. pp. 83-86.
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Taco, Ramiro ; Garzón, Esteban ; Hanhan, Robert et al. / Designing Precharge-Free Energy-Efficient Content-Addressable Memories. In: IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 2024 ; Vol. 32, No. 12. pp. 2303-2314.
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Jahshan, Zuher ; Yavits, Leonid. / ViTAL : Vision TrAnsformer based Low coverage SARS-CoV-2 lineage assignment. In: Bioinformatics. 2024 ; Vol. 40, No. 3.
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Shavit, Netanel ; Stanger, Inbal ; Taco, Ramiro et al. / Low Power, Energy Efficient and High Performance Triple Mode Logic for IoT Applications. 2024 19th Conference on Ph.D Research in Microelectronics and Electronics, PRIME 2024. Institute of Electrical and Electronics Engineers Inc., 2024. (2024 19th Conference on Ph.D Research in Microelectronics and Electronics, PRIME 2024).
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Yavits, L. / DRAMA : Commodity DRAM Based Content Addressable Memory. In: IEEE Computer Architecture Letters. 2024 ; Vol. 23, No. 1. pp. 65-68.
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Garzon, Esteban ; Hanhan, Robert ; Lanuzza, Marco et al. / FASTA : Revisiting Fully Associative Memories in Computer Microarchitecture. In: IEEE Access. 2024 ; Vol. 12. pp. 13923-13943.
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2023

Garzon, Esteban ; Lanuzza, Marco ; Teman, Adam et al. / AM4 : MRAM Crossbar Based CAM/TCAM/ACAM/AP for In-Memory Computing. In: IEEE Journal on Emerging and Selected Topics in Circuits and Systems. 2023 ; Vol. 13, No. 1. pp. 408-421.
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Khalifa, Marcel ; Hoffer, Barak ; Leitersdorf, Orian et al. / ClaPIM : Scalable Sequence Classification Using Processing-in-Memory. In: IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 2023 ; Vol. 31, No. 9. pp. 1347-1357.
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Garzon, Esteban ; Yavits, Leonid ; Finocchio, Giovanni et al. / A Low-Energy DMTJ-Based Ternary Content- Addressable Memory With Reliable Sub-Nanosecond Search Operation. In: IEEE Access. 2023 ; Vol. 11. pp. 16812-16819.
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Garzon, Esteban ; Golman, Roman ; Lanuzza, Marco et al. / A Low-Complexity Sensing Scheme for Approximate Matching Content-Addressable Memory. In: IEEE Transactions on Circuits and Systems II: Express Briefs. 2023 ; Vol. 70, No. 10. pp. 3867-3871.
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Jahshan, Zuher ; Merlin, Itay ; Garzón, Esteban et al. / DASH-CAM : Dynamic Approximate SearcH Content Addressable Memory for genome classification. Proceedings of the 56th Annual IEEE/ACM International Symposium on Microarchitecture, MICRO 2023. Association for Computing Machinery, Inc, 2023. pp. 1453-1465 (Proceedings of the 56th Annual IEEE/ACM International Symposium on Microarchitecture, MICRO 2023).
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Garzon, Esteban ; Yavits, Leonid ; Teman, Adam et al. / STT-MRAM Technology For Energy-Efficient Cryogenic Memory Applications. LASCAS 2023 - 14th IEEE Latin American Symposium on Circuits and Systems, Proceedings. editor / Monica Karel Huerta. Institute of Electrical and Electronics Engineers Inc., 2023. (LASCAS 2023 - 14th IEEE Latin American Symposium on Circuits and Systems, Proceedings).
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Yavits, Leonid. / Will computing in memory become a new dawn of associative processors?. In: Memories - Materials, Devices, Circuits and Systems. 2023 ; Vol. 4.
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Garzón, Esteban ; Yavits, Leonid ; Teman, Adam et al. / Approximate Content-Addressable Memories : A Review. In: Chips. 2023 ; Vol. 2, No. 2. pp. 70-82.
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Stanger, Inbal ; Shavit, Netanel ; Taco, Ramiro et al. / FlexDML : High Utilization Configurable Multimode Arithmetic Units Featuring Dual Mode Logic. In: IEEE Solid-State Circuits Letters. 2023 ; Vol. 6. pp. 73-76.
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2022

Garzón, Esteban ; Yavits, Leonid ; Lanuzza, Marco et al. / Emerging Memory Structures for VLSI Circuits. Wiley Encyclopedia of Electrical and Electronics Engineering. Chichester, England, UK : John Wiley & Sons, Ltd, 2022. pp. 1-28
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Garzón, Esteban ; Golman, Roman ; Jahshan, Zuher et al. / Hamming Distance Tolerant Content-Addressable Memory (HD-CAM) for DNA Classification. In: IEEE Access. 2022 ; Vol. 10. pp. 28080-28093.
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Hanhan, Robert ; Garzón, Esteban ; Jahshan, Zuher et al. / EDAM : Edit Distance tolerant Approximate Matching content addressable memory. ISCA 2022 - Proceedings of the 49th Annual International Symposium on Computer Architecture. Institute of Electrical and Electronics Engineers Inc., 2022. pp. 495-507 (Proceedings - International Symposium on Computer Architecture).
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Garzon, Esteban ; Teman, Adam ; Lanuzza, Marco et al. / AIDA : Associative In-Memory Deep Learning Accelerator. In: IEEE Micro. 2022 ; Vol. 42, No. 6. pp. 67-75.
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Jahshan, Zuher ; Alkan, Can ; Yavits, Leonid. / CoViT : Real-time phylogenetics for the SARS-CoV-2 pandemic using Vision Transformers. 2022.
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2021

Yavits, Leonid ; Kaplan, Roman ; Ginosar, Ran. / GIRAF : General Purpose In-Storage Resistive Associative Framework. In: IEEE Transactions on Parallel and Distributed Systems. 2021 ; Vol. 33, No. 2. pp. 276-287.
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Khalifa, Marcel ; Ben-Hur, Rotem ; Ronen, Ronny et al. / FiltPIM : In-Memory Filter for DNA Sequencing. 2021 28th IEEE International Conference on Electronics, Circuits, and Systems, ICECS 2021 - Proceedings. Institute of Electrical and Electronics Engineers Inc., 2021. (2021 28th IEEE International Conference on Electronics, Circuits, and Systems, ICECS 2021 - Proceedings).
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2020

Kaplan, Roman ; Yavits, Leonid ; Ginosasr, Ran. / BioSEAL : In-Memory Biological Sequence Alignment Accelerator for Large-Scale Genomic Data. SYSTOR 2020 - Proceedings of the 13th ACM International Systems and Storage Conference. Association for Computing Machinery, 2020. pp. 36-48 (SYSTOR 2020 - Proceedings of the 13th ACM International Systems and Storage Conference).
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Taco, Ramiro ; Yavits, Leonid ; Shavit, Netanel et al. / Exploiting single-well design for energy-efficient ultra-wide voltage range Dual Mode Logic -based digital circuits in 28nm FD-SOI technology. 2020 IEEE International Symposium on Circuits and Systems, ISCAS 2020 - Proceedings. Institute of Electrical and Electronics Engineers Inc., 2020. (Proceedings - IEEE International Symposium on Circuits and Systems).
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Yavits, Leonid ; Orosa, Lois ; Mahar, Suyash et al. / WoLFRaM : Enhancing Wear-Leveling and Fault Tolerance in Resistive Memories using Programmable Address Decoders. Proceedings - 2020 IEEE 38th International Conference on Computer Design, ICCD 2020. Institute of Electrical and Electronics Engineers Inc., 2020. pp. 187-196 (Proceedings - IEEE International Conference on Computer Design: VLSI in Computers and Processors).
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Yavits, Leonid ; Taco, Ramiro ; Shavit, Netanel et al. / Dual mode logic address decoder. 2020 IEEE International Symposium on Circuits and Systems, ISCAS 2020 - Proceedings. Institute of Electrical and Electronics Engineers Inc., 2020. (Proceedings - IEEE International Symposium on Circuits and Systems).
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Stanger, Inbal ; Shavit, Netanel ; Taco, Ramiro et al. / Robust dual mode pass logic (DMPL) for energy efficiency and high performance. 2020 IEEE International Symposium on Circuits and Systems, ISCAS 2020 - Proceedings. Institute of Electrical and Electronics Engineers Inc., 2020. (Proceedings - IEEE International Symposium on Circuits and Systems).
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2019

Yavits, Leonid ; Kaplan, Roman ; Ginosar, Ran. / Giraf : General purpose in-storage resistive associative framework. Proceedings - 2019 28th International Conference on Parallel Architectures and Compilation Techniques, PACT 2019. Institute of Electrical and Electronics Engineers Inc., 2019. pp. 476-477 (Parallel Architectures and Compilation Techniques - Conference Proceedings, PACT).
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Kaplan, Roman ; Yavits, Leonid ; Ginosar, Ran. / POSTER : BioSEAL: In-memory biological sequence alignment accelerator for large-scale genomic data. Proceedings - 2019 28th International Conference on Parallel Architectures and Compilation Techniques, PACT 2019. Institute of Electrical and Electronics Engineers Inc., 2019. pp. 458-459 (Parallel Architectures and Compilation Techniques - Conference Proceedings, PACT).
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Kaplan, Roman ; Yavits, Leonid ; Ginosar, Ran. / RASSA : Resistive Prealignment Accelerator for Approximate DNA Long Read Mapping. In: IEEE Micro. 2019 ; Vol. 39, No. 4. pp. 44-54.
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2018

Yavits, Leonid ; Kaplan, Roman ; Ginosar, Ran. / Aida : Associative DNN Inference Accelerator. 2018.
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Yavits, Leonid ; Ginosar, Ran. / Accelerator for Sparse Machine Learning. In: IEEE Computer Architecture Letters. 2018 ; Vol. 17, No. 1. pp. 21-24.
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Yavits, Leonid ; Kaplan, Roman ; Ginosar, Ran. / Enabling full associativity with memristive address decoder. In: IEEE Micro. 2018 ; Vol. 38, No. 5. pp. 32-40.
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Yavits, Leonid (Inventor) ; Ginosar, Ran (Inventor) ; Weiser, Uri (Inventor) et al. / Resistive address decoder and virtually addressed memory. Feb 13, 2018.
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Kaplan, Roman ; Yavits, Leonid ; Ginosar, Ran. / PRINS : Processing-in-Storage Acceleration of Machine Learning. In: IEEE Transactions on Nanotechnology. 2018 ; Vol. 17, No. 5. pp. 889-896.
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2017

Kaplan, Roman ; Yavits, Leonid ; Ginosar, Ran. / From processing-in-memory to processing-in-storage. In: Supercomputing Frontiers and Innovations. 2017 ; Vol. 4, No. 3. pp. 99-116.
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Yavits, Leonid ; Ginosar, Ran. / Sparse Matrix Multiplication on CAM Based Accelerator. 2017.
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Yavits, Leonid ; Morad, Amir ; Weiser, Uri et al. / MultiAmdahl : Optimal Resource Allocation in Heterogeneous Architectures. 2017.
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Kaplan, Roman ; Yavits, Leonid ; Ginosar, Ran et al. / A Resistive CAM Processing-in-Storage Architecture for DNA Sequence Alignment. In: IEEE Micro. 2017 ; Vol. 37, No. 4. pp. 20-28.
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Kaplan, R. ; Yavits, L. ; Morad, A. et al. / Deduplication in resistive content addressable memory based solid state drive. Proceedings - 2016 26th International Workshop on Power and Timing Modeling, Optimization and Simulation, PATMOS 2016. Institute of Electrical and Electronics Engineers Inc., 2017. pp. 100-106 (Proceedings - 2016 26th International Workshop on Power and Timing Modeling, Optimization and Simulation, PATMOS 2016).
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Yavits, Leonid ; Weiser, Uri ; Ginosar, Ran. / Resistive address decoder. In: IEEE Computer Architecture Letters. 2017 ; Vol. 16, No. 2. pp. 141-144.
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2016

Yavits, L. ; Morad, A. ; Ginosar, R. / The Effect of Temperature on Amdahl Law in 3D Multicore Era. In: IEEE Transactions on Computers. 2016 ; Vol. 65, No. 6. pp. 2010-2013.
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Yavits, L. ; Morad, A. ; Ginosar, R. et al. / Convex Optimization of Real Time SoC. 2016.
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Kaplan, R. ; Yavits, L. ; Weiser, U. et al. / An In-Storage Implementation of Smith-Waterman in Resistive CAM. 2016.
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Morad, Amir ; Yavits, Leonid ; Kvatinsky, Shahar et al. / Resistive GP-SIMD processing-in-memory. In: ACM Transactions on Architecture and Code Optimization. 2016 ; Vol. 12, No. 4.
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Yavits, Leonid ; Morad, Amir ; Ginosar, Ran. / Effect of Data Sharing on Private Cache Design in Chip Multiprocessors. 2016.
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Morad, Amir (Inventor) ; Yavits, Leonid (Inventor) ; Kvatinsky, Shahar (Inventor) et al. / Hybrid processor. Jan 07, 2016.
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2015

Yavits, L. ; Morad, A. ; Ginosar, R. / Sparse Matrix Multiplication on An Associative Processor. In: IEEE Transactions on Parallel and Distributed Systems. 2015 ; Vol. 26, No. 11. pp. 3175-3183.
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Yavits, Leonid ; Morad, Amir ; Ginosar, Ran. / Computer Architecture with Associative Processor Replacing Last-Level Cache and SIMD Accelerator. In: IEEE Transactions on Computers. 2015 ; Vol. 64, No. 2. pp. 368-381.
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Yavits, Leonid ; Kvatinsky, Shahar ; Morad, Amir et al. / Resistive Associative Processor. In: IEEE Computer Architecture Letters. 2015 ; Vol. 14, No. 2. pp. 148-151.
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Morad, Amir ; Yavits, Leonid ; Ginosar, Ran. / GP-SIMD processing-in-memory. In: ACM Transactions on Architecture and Code Optimization. 2015 ; Vol. 11, No. 4.
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2014

Morad, Amir ; Yavits, Leonid ; Ginosar, Ran. / Convex optimization of resource allocation in asymmetric and heterogeneous SoC. 2014 24th International Workshop on Power and Timing Modeling, Optimization and Simulation, PATMOS 2014. Institute of Electrical and Electronics Engineers Inc., 2014. (2014 24th International Workshop on Power and Timing Modeling, Optimization and Simulation, PATMOS 2014).
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Morad, Amir ; Morad, Tomer Y. ; Leonid, Yavits et al. / Generalized MultiAmdahl : Optimization of heterogeneous multi-accelerator SoC. In: IEEE Computer Architecture Letters. 2014 ; Vol. 13, No. 1. pp. 37-40.
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Yavits, Leonid ; Morad, Amir ; Ginosar, Ran. / Cache Hierarchy Optimization. In: IEEE Computer Architecture Letters. 2014 ; Vol. 13, No. 2. pp. 69-72.
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Morad, Amir ; Yavits, Leonid ; Ginosar, Ran. / Efficient dense and sparse matrix multiplication on GP-SIMD. 2014 24th International Workshop on Power and Timing Modeling, Optimization and Simulation, PATMOS 2014. Institute of Electrical and Electronics Engineers Inc., 2014. (2014 24th International Workshop on Power and Timing Modeling, Optimization and Simulation, PATMOS 2014).
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Yavits, L. ; Morad, A. ; Ginosar, R. / The effect of communication and synchronization on Amdahl's law in multicore systems. In: Parallel Computing. 2014 ; Vol. 40, No. 1. pp. 1-16.
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2013

Yavits, Leonid ; Morad, Amir ; Ginosar, Ran. / 3D cache hierarchy optimization. 2013 IEEE International 3D Systems Integration Conference, 3DIC 2013. 2013. (2013 IEEE International 3D Systems Integration Conference, 3DIC 2013).
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Yavits, Leonid ; Morad, Amir ; Ginosar, Ran. / Thermal analysis of 3D associative processor. 2013.
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2009

Morad, Tomer Yosef (Inventor) ; Yavits, Leonid (Inventor) ; Morad, Amir (Inventor) et al. / Automotive entertainment, communication, navigation and control center. Jan 19, 2009.
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2008

Morad, Amir (Inventor) ; Yavits, Leonid (Inventor) ; Morad, Tomer Y. (Inventor) et al. / Targeted content with broadcast material. Mar 11, 2008.
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Yavits, Leonid (Inventor) ; Morad, Amir (Inventor) ; Corp, Broadcom (Inventor). / Video encoding and video/audio/data multiplexing device. May 13, 2008.
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2007

Austerlitz, Ofer (Inventor) ; Morad, Amir (Inventor) ; Yavits, Leonid (Inventor) et al. / Set top box with transcoding capabilities. Apr 17, 2007.
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Austerlitz, Ofer (Inventor) ; Oxman, Gedalia (Inventor) ; Khrapkovsky, Michael (Inventor) et al. / Hybrid hierarchical motion estimation for video streams. Apr 17, 2007.
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Morad, Amir (Inventor) ; Yavits, Leonid (Inventor) ; Dimnik, Ilan (Inventor) et al. / Method and apparatus for video pixel interpolation. Jan 22, 2007.
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Oxman, Gedalia (Inventor) ; Madar, Hila (Inventor) ; Morad, Amir (Inventor) et al. / Audio Processor. Aug 23, 2007.
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Morad, Amir (Inventor) ; Yavits, Leonid (Inventor) ; Oxman, Gedalia (Inventor) et al. / Stream multiplexer/de-multiplexer. Mar 28, 2007.
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Oxman, Gedalia (Inventor) ; Landis, Shay (Inventor) ; Twito, Moshe (Inventor) et al. / Media processor with an integrated TV receiver. Mar 29, 2007.
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2006

Yavits, Leonid (Inventor) ; Morad, Amir (Inventor) ; Corp, Broadcom (Inventor). / Video encoding and video/audio/data multiplexing device. Jun 14, 2006.
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Morad, Amir (Inventor) ; Yavits, Leonid (Inventor) ; Oxman, Gedalia (Inventor) et al. / Integrated circuit, an encoder/decoder architecture, and a method for processing a media stream. Nov 22, 2006.
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Morad, Amir (Inventor) ; Yavits, Leonid (Inventor) ; Oxman, Gedalia (Inventor) et al. / Home gateway for multiple units. Nov 22, 2006.
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2004

Morad, Amir (Inventor) ; Yavits, Leonid (Inventor) ; Oxman, Gadi (Inventor) et al. / SYSTEM AND METHOD FOR MULTI-CHANNEL VIDEO AND AUDIO ENCODING ON A SINGLE CHIP. Patent No.: EP1430706. Jun 23, 2004.
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Morad, Amir (Inventor) ; Yavits, Leonid (Inventor) ; Oxman, Gadi (Inventor) et al. / System and method for video and audio encoding on a single chip. Feb 10, 2004.
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2003

Yavits, Leonid (Inventor) ; Morad, Amir (Inventor) ; Individual (Inventor). / Video encoding and video/audio/data multiplexing device. Dec 22, 2003.
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2002

Morad, Amir (Inventor) ; Yavits, Leonid (Inventor) ; Oxman, Gadi (Inventor) et al. / System and method for video and audio encoding on a single chip. Jun 11, 2002.
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Morad, Amir (Inventor) ; Yavits, Leonid (Inventor) ; Corp, Broadcom (Inventor). / Video encoding device. Jan 31, 2002.
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2001

Morad, Amir (Inventor) ; Yavits, Leonid (Inventor) ; Corp, Broadcom (Inventor). / Video encoding device. Nov 19, 2001.
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2000

Yavits, Leonid (Inventor) ; Morad, Amir (Inventor) ; Corp, Broadcom (Inventor). / Video encoding and video/audio/data multiplexing device. Apr 06, 2000.
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1998

Morad, Amir (Inventor) ; Yavits, Leonid (Inventor) ; Ltd, Visiontech (Inventor). / Video encoding device. Jan 22, 1998.
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