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Research Outputs

I am an Associate Professor at Bar-Ilan University in Ramat Gan, Israel, and a Co-Director of the Emerging Nanoscaled Circuits and Systems (EnICS) Labs at BIU. I currently also head the NanoElectronics Track in the Department of Electrical Engineering and have recently initiated a new study program for "Hardware and Chip Design Engineering" in the Department of Computer Engineering and the "IC Academy at BIU" - a post-degree program for upskilling in hardware fields. I am a big proponent of open-access learning materials for hardware engineers.

2025

Moposita, Tatiana ; Garzón, Esteban ; Teman, Adam et al. / Cryo-SIMPLY : A Reliable STT-MRAM-Based Smart Material Implication Architecture for In-Memory Computing. In: Nanomaterials. 2024 ; Vol. 15, No. 1.
Garzón, Esteban ; Rechef, Eyal ; Golman, Roman et al. / A 128-kbit Approximate Search-Capable Content-Addressable Memory (CAM) With Tunable Hamming Distance. In: IEEE Journal of Solid-State Circuits. 2025 ; Vol. 60, No. 8. pp. 3009-3019.
Kokane, Omkar ; Raut, Gopal ; Ullah, Salim et al. / Retrospective : A CORDIC Based Configurable Activation Function for NN Applications. IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2025 - Conference Proceedings. IEEE Computer Society, 2025. (Proceedings of IEEE Computer Society Annual Symposium on VLSI, ISVLSI).
Kokane, Omkar ; Lokhande, Mukul ; Raut, Gopal et al. / LPRE : Logarithmic Posit-enabled Reconfigurable edge-AI Engine. ISCAS 2025 - IEEE International Symposium on Circuits and Systems, Proceedings. Institute of Electrical and Electronics Engineers Inc., 2025. (Proceedings - IEEE International Symposium on Circuits and Systems).
Harel, Odem ; Yigit, Andac ; Feifel, Eliana et al. / A 16-kB 65-nm GC-eDRAM Macro With Internal Bias Voltage Generation Providing Over 100-μs Retention Time. In: IEEE Journal of Solid-State Circuits. 2025 ; Vol. 60, No. 6. pp. 2239-2248.
Taco, Ramiro ; Garzón, Esteban ; Teman, Adam et al. / Towards Low-Power High-Performance Content-Addressable Memory : A Robust Precharge-Free Approach. ISCAS 2025 - IEEE International Symposium on Circuits and Systems, Proceedings. Institute of Electrical and Electronics Engineers Inc., 2025. (Proceedings - IEEE International Symposium on Circuits and Systems).

2024

Taco, Ramiro ; Garzón, Esteban ; Hanhan, Robert et al. / Designing Precharge-Free Energy-Efficient Content-Addressable Memories. In: IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 2024 ; Vol. 32, No. 12. pp. 2303-2314.
Kra, Yehuda ; Shoshan, Yonatan ; Rudin, Yehuda et al. / HAMSA-DI : A Low-Power Dual-Issue RISC-V Core Targeting Energy-Efficient Embedded Systems. In: IEEE Transactions on Circuits and Systems I: Regular Papers. 2024 ; Vol. 71, No. 1. pp. 223-236.
Kra, Yehuda ; Rudin, Yehuda ; Fish, Alex et al. / Basecalling by Statistical Profiling and Hardware-Accelerated Convolutional Neural Network. 2024 19th Conference on Ph.D Research in Microelectronics and Electronics, PRIME 2024. Institute of Electrical and Electronics Engineers Inc., 2024. (2024 19th Conference on Ph.D Research in Microelectronics and Electronics, PRIME 2024).
Golman, Roman ; Segev, Avinoam ; Teman, Adam. / A 4T GC-eDRAM Bitcell with Differential Readout Mechanism For High Performance Applications. 2024 19th Conference on Ph.D Research in Microelectronics and Electronics, PRIME 2024. Institute of Electrical and Electronics Engineers Inc., 2024. (2024 19th Conference on Ph.D Research in Microelectronics and Electronics, PRIME 2024).
Golman, Roman ; Giterman, Robert ; Teman, Adam. / Multi-Ported GC-eDRAM Bitcell with Dynamic Port Configuration and Refresh Mechanism †. In: Journal of Low Power Electronics and Applications. 2024 ; Vol. 14, No. 1.
Kra, Yehuda ; Kra, Naama ; Teman, Adam. / Selfie5 : An Autonomous, Self-Contained Verification Approach for High-Throughput Random Testing of Programmable Processors. 2024 Design, Automation and Test in Europe Conference and Exhibition, DATE 2024 - Proceedings. Institute of Electrical and Electronics Engineers Inc., 2024. (Proceedings -Design, Automation and Test in Europe, DATE).
Roknian, Noam ; Shoshan, Yonatan ; Stanger, Inbal et al. / Methodologies for Device Characterization in Cryogenic Temperatures. 2024 19th Conference on Ph.D Research in Microelectronics and Electronics, PRIME 2024. Institute of Electrical and Electronics Engineers Inc., 2024. (2024 19th Conference on Ph.D Research in Microelectronics and Electronics, PRIME 2024).
Stanger, Inbal ; Roknian, Noam ; Shavit, Netanel et al. / Revisiting Dynamic Logic - A True Candidate for Energy-Efficient Cryogenic Operation in Nanoscaled Technologies. In: IEEE Transactions on Circuits and Systems I: Regular Papers. 2024 ; Vol. 71, No. 3. pp. 987-999.
Garzon, Esteban ; Hanhan, Robert ; Lanuzza, Marco et al. / FASTA : Revisiting Fully Associative Memories in Computer Microarchitecture. In: IEEE Access. 2024 ; Vol. 12. pp. 13923-13943.

2023

Garzon, Esteban ; Yavits, Leonid ; Teman, Adam et al. / STT-MRAM Technology For Energy-Efficient Cryogenic Memory Applications. LASCAS 2023 - 14th IEEE Latin American Symposium on Circuits and Systems, Proceedings. editor / Monica Karel Huerta. Institute of Electrical and Electronics Engineers Inc., 2023. (LASCAS 2023 - 14th IEEE Latin American Symposium on Circuits and Systems, Proceedings).
Garzon, Esteban ; Lanuzza, Marco ; Teman, Adam et al. / AM4 : MRAM Crossbar Based CAM/TCAM/ACAM/AP for In-Memory Computing. In: IEEE Journal on Emerging and Selected Topics in Circuits and Systems. 2023 ; Vol. 13, No. 1. pp. 408-421.
Marinberg, Hanan ; Garzon, Esteban ; Noy, Tzachi et al. / Efficient Implementation of Many-Ported Memories by Using Standard-Cell Memory Approach. In: IEEE Access. 2023 ; Vol. 11. pp. 94885-94897.
Garzon, Esteban ; Yavits, Leonid ; Finocchio, Giovanni et al. / A Low-Energy DMTJ-Based Ternary Content- Addressable Memory With Reliable Sub-Nanosecond Search Operation. In: IEEE Access. 2023 ; Vol. 11. pp. 16812-16819.
Garzon, Esteban ; Golman, Roman ; Lanuzza, Marco et al. / A Low-Complexity Sensing Scheme for Approximate Matching Content-Addressable Memory. In: IEEE Transactions on Circuits and Systems II: Express Briefs. 2023 ; Vol. 70, No. 10. pp. 3867-3871.
Garzón, Esteban ; Yavits, Leonid ; Teman, Adam et al. / Approximate Content-Addressable Memories : A Review. In: Chips. 2023 ; Vol. 2, No. 2. pp. 70-82.
Roknian, Noam ; Shoshan, Yonatan ; Stanger, Inbal et al. / Overview of Cryogenic Operation in Nanoscale Technology Nodes. LASCAS 2023 - 14th IEEE Latin American Symposium on Circuits and Systems, Proceedings. editor / Monica Karel Huerta. Institute of Electrical and Electronics Engineers Inc., 2023. (LASCAS 2023 - 14th IEEE Latin American Symposium on Circuits and Systems, Proceedings).

2022

Garzón, Esteban ; Teman, Adam ; Lanuzza, Marco. / Embedded memories for cryogenic applications. In: Electronics (Switzerland). 2022 ; Vol. 11, No. 1.
Garzon, Esteban ; Golman, Roman ; Harel, Odem et al. / A RISC-V-based Research Platform for Rapid Design Cycle. IEEE International Symposium on Circuits and Systems, ISCAS 2022. Institute of Electrical and Electronics Engineers Inc., 2022. pp. 2614-2615 (Proceedings - IEEE International Symposium on Circuits and Systems).
Garzón, Esteban ; De Rose, Raffaele ; Crupi, Felice et al. / Adjusting thermal stability in double-barrier MTJ for energy improvement in cryogenic STT-MRAMs. In: Solid-State Electronics. 2022 ; Vol. 194.
Harel, Odem ; Casarrubias, Emmanuel Nieto ; Eggimann, Manuel et al. / 64-kB 65-nm GC-eDRAM with Half-Select Support and Parallel Refresh Technique. In: IEEE Solid-State Circuits Letters. 2022 ; Vol. 5. pp. 170-173.
Kra, Yehuda ; Weitzman, Yoav ; Teman, Adam. / SerOpt : Transistor Sizing Algorithm and Optimization Utility for Minimizing Soft Error Rate. DCIS 2022 - Proceedings of the 37th Conference on Design of Circuits and Integrated Systems. Institute of Electrical and Electronics Engineers Inc., 2022. (DCIS 2022 - Proceedings of the 37th Conference on Design of Circuits and Integrated Systems).
Hanhan, Robert ; Garzón, Esteban ; Jahshan, Zuher et al. / EDAM : Edit Distance tolerant Approximate Matching content addressable memory. ISCA 2022 - Proceedings of the 49th Annual International Symposium on Computer Architecture. Institute of Electrical and Electronics Engineers Inc., 2022. pp. 495-507 (Proceedings - International Symposium on Computer Architecture).
Garzon, Esteban ; Teman, Adam ; Lanuzza, Marco et al. / AIDA : Associative In-Memory Deep Learning Accelerator. In: IEEE Micro. 2022 ; Vol. 42, No. 6. pp. 67-75.
Garzón, Esteban ; Golman, Roman ; Jahshan, Zuher et al. / Hamming Distance Tolerant Content-Addressable Memory (HD-CAM) for DNA Classification. In: IEEE Access. 2022 ; Vol. 10. pp. 28080-28093.
Garzón, Esteban ; Yavits, Leonid ; Lanuzza, Marco et al. / Emerging Memory Structures for VLSI Circuits. Wiley Encyclopedia of Electrical and Electronics Engineering. Chichester, England, UK : John Wiley & Sons, Ltd, 2022. pp. 1-28
Stanger, Inbal ; Roknian, Noam ; Shoshan, Yonatan et al. / Evaluation of Dual Mode Logic Under Cryogenic Temperatures. IEEE International Symposium on Circuits and Systems, ISCAS 2022. Institute of Electrical and Electronics Engineers Inc., 2022. pp. 361-364 (Proceedings - IEEE International Symposium on Circuits and Systems).
Kra, Yehuda ; Teman, Adam. / Silicon-Proven Clockless Wave-Propagated Pipelining for High-Throughput, Energy-Efficient Processing. IEEE International Symposium on Circuits and Systems, ISCAS 2022. Institute of Electrical and Electronics Engineers Inc., 2022. pp. 1138-1139 (Proceedings - IEEE International Symposium on Circuits and Systems).

2021

Garzón, Esteban ; Golman, Roman ; Jahshan, Zuher et al. / Hamming Distance Tolerant Content-Addressable Memory (HD-CAM) for Approximate Matching Applications. In: IEEE Access. 2021.
Garzon, Esteban ; De Rose, Raffaele ; Crupi, Felice et al. / Simulation Analysis of DMTJ-Based STT-MRAM Operating at Cryogenic Temperatures. In: IEEE Transactions on Magnetics. 2021 ; Vol. 57, No. 7.
Kra, Yehuda ; Noy, Tzachi ; Teman, Adam. / WP 2.0 : Signoff-Quality Implementation and Validation of Energy-Efficient Clock-Less Wave Propagated Pipelining. Proceedings of the 2021 Design, Automation and Test in Europe, DATE 2021. Institute of Electrical and Electronics Engineers Inc., 2021. pp. 1574-1579 (Proceedings -Design, Automation and Test in Europe, DATE).
Garzon, Esteban ; Greenblatt, Yosi ; Harel, Odem et al. / Gain-Cell Embedded DRAM under Cryogenic Operation-A First Study. In: IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 2021 ; Vol. 29, No. 7. pp. 1319-1324.
Golman, Roman ; Nachum, Netanel ; Cohen, Tomer et al. / Refresh Algorithm for Ensuring 100% Memory Availability in Gain-Cell Embedded DRAM Macros. In: IEEE Access. 2021 ; Vol. 9. pp. 105831-105840.
Avnon, Asaf ; Golman, Roman ; Garzón, Esteban et al. / Quantum capacitance transient phenomena in high-k dielectric armchair graphene nanoribbon field-effect transistor model. In: Solid-State Electronics. 2021 ; Vol. 184.
Teman, Adam (Inventor) ; Shalom, Amir (Inventor) ; Giterman, Robert (Inventor) et al. / Fin-fet gain cells. US Patent Application. Patent No.: US20210166751A1. Jun 03, 2021.
Levy, Einat ; Sfez, Aharon ; Golman, Roman et al. / 4T gain-cell providing unlimited availability through hidden refresh with 1W1R functionality. 2021 IEEE International Symposium on Circuits and Systems, ISCAS 2021 - Proceedings. Institute of Electrical and Electronics Engineers Inc., 2021. (Proceedings - IEEE International Symposium on Circuits and Systems).
Garzón, Esteban ; De Rose, Raffaele ; Crupi, Felice et al. / Relaxing non-volatility for energy-efficient DMTJ based cryogenic STT-MRAM. In: Solid-State Electronics. 2021 ; Vol. 184.
Garzon, Esteban ; De Rose, Raffaele ; Crupi, Felice et al. / Exploiting STT-MRAMs for Cryogenic Non-Volatile Cache Applications. In: IEEE Transactions on Nanotechnology. 2021 ; Vol. 20. pp. 123-128.

2020

Bonetti, Andrea ; Golman, Roman ; Giterman, Robert et al. / Gain-Cell Embedded DRAMs : Modeling and Design Space. In: IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 2020 ; Vol. 28, No. 3. pp. 646-659.
Giterman, Robert (Inventor) ; Teman, Adam (Inventor). / GAIN CELL EMBEDDED DRAM IN FULLY DEPLETED SILICON-ON-INSULATOR TECHNOLOGY. Patent No.: WO2020012470. Jan 16, 2020.
Maltabashi, Or ; Kra, Yehuda ; Teman, Adam. / Physically Aware Affinity-Driven Multiplier Implementation. In: IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. 2020 ; Vol. 39, No. 10. pp. 2886-2897.
Kra, Yehuda ; Noy, Tzachi ; Teman, Adam. / WavePro : Clock-less Wave-Propagated Pipeline Compiler for Low-Power and High-Throughput Computation. Proceedings of the 2020 Design, Automation and Test in Europe Conference and Exhibition, DATE 2020. editor / Giorgio Di Natale ; Cristiana Bolchini ; Elena-Ioana Vatajelu. Institute of Electrical and Electronics Engineers Inc., 2020. pp. 1291-1294 (Proceedings of the 2020 Design, Automation and Test in Europe Conference and Exhibition, DATE 2020).
Teman, Adam (Inventor) ; Noy, Tzachi (Inventor). / REFRESH CONTROLLER FOR FIRST-IN FIRST-OUT MEMORIES. Patent No.: US2020168270. May 28, 2020.
Bonetti, Andrea ; Golman, Roman ; Giterman, Robert et al. / Gain-cell embedded DRAMs : Modeling and design space. 2020 IEEE International Symposium on Circuits and Systems, ISCAS 2020 - Proceedings. Institute of Electrical and Electronics Engineers Inc., 2020. (Proceedings - IEEE International Symposium on Circuits and Systems).
Giterman, Robert ; Shalom, Amir ; Burg, Andreas et al. / A 1-Mbit Fully Logic-Compatible 3T Gain-Cell Embedded DRAM in 16-nm FinFET. In: IEEE Solid-State Circuits Letters. 2020 ; Vol. 3. pp. 110-113.
Vana, Daniel ; Gaillardon, Pierre Emmanuel ; Teman, Adam. / CC2TIG : Dynamic C2MOS Design Based on Three-Independent-Gate Field-Effect Transistors. In: IEEE Transactions on Nanotechnology. 2020 ; Vol. 19. pp. 123-136.
Noy, Tzachi ; Teman, Adam. / Design of a Refresh-Controller for GC-eDRAM Based FIFOs. In: IEEE Transactions on Circuits and Systems I: Regular Papers. 2020 ; Vol. 67, No. 12. pp. 4804-4817.
Haran, Avner ; Keren, Eitan ; David, David et al. / Single-Event Upset Tolerance Study of a Low-Voltage 13T Radiation-Hardened SRAM Bitcell. In: IEEE Transactions on Nuclear Science. 2020 ; Vol. 67, No. 8. pp. 1803-1812.
Giterman, Robert ; Bonetti, Andrea ; Burg, Andreas et al. / GC-eDRAM with body-bias compensated readout and error detection in 28nm FD-SOI. 2020 IEEE International Symposium on Circuits and Systems, ISCAS 2020 - Proceedings. Institute of Electrical and Electronics Engineers Inc., 2020. (Proceedings - IEEE International Symposium on Circuits and Systems).
Golman, Roman ; Giterman, Robert ; Harel, Odem et al. / Improved read access in GC-EDRAM memory by dual-negative word-line technique. 2020 IEEE International Symposium on Circuits and Systems, ISCAS 2020 - Proceedings. Institute of Electrical and Electronics Engineers Inc., 2020. (Proceedings - IEEE International Symposium on Circuits and Systems).
Giterman, Robert ; Bonetti, Andrea ; Bravo, Ester Vicario et al. / Current-Based Data-Retention-Time Characterization of Gain-Cell Embedded DRAMs across the Design and Variations Space. In: IEEE Transactions on Circuits and Systems I: Regular Papers. 2020 ; Vol. 67, No. 4. pp. 1207-1217.

2019

Munk, Tom ; Kugler, Hillel ; Maori, Ofir et al. / TEMPO : Thermal-efficient management of power in high-throughput network switches. 2019 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2019. Institute of Electrical and Electronics Engineers Inc., 2019. (2019 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2019).
Mentovich, Elad (Inventor) ; Geuli, Narkis (Inventor) ; Giterman, Robert (Inventor) et al. / High-density memory macro. Patent No.: US2019074040. Mar 07, 2019.
Shalom, Amir ; Fish, Alexander ; Teman, Adam. / A 9pW/bit 400mV 3T Gain-Cell eDRAM for ULP Applications in 28 nm FD-SOI. 2019 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference, S3S 2019. Institute of Electrical and Electronics Engineers Inc., 2019. (2019 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference, S3S 2019).
Giterman, Robert ; Golman, Roman ; Teman, Adam. / Improving Energy-Efficiency in Dynamic Memories Through Retention Failure Detection. In: IEEE Access. 2019 ; Vol. 7. pp. 27641-27649.
Giterman, Robert ; Bonetti, Andrea ; Burg, Andreas et al. / GC-eDRAM with Body-Bias Compensated Readout and Error Detection in 28-nm FD-SOI. In: IEEE Transactions on Circuits and Systems II: Express Briefs. 2019 ; Vol. 66, No. 12. pp. 2042-2046.

2018

Teman, A. ; Golman, Roman ; Giterman, R. / A Dual Negative Word-Line Technique for Improving Read Access in GC-eDRAM Arrays. IEEE Int. Conf. on the Science of Electrical Engineering (ICSEE). 2018.
Giterman, Robert ; Fish, Alexander ; Geuli, Narkis et al. / An 800-MHz Mixed-VT 4T IFGC Embedded DRAM in 28-nm CMOS Bulk Process for Approximate Storage Applications. In: IEEE Journal of Solid-State Circuits. 2018 ; Vol. 53, No. 7. pp. 2136-2148.
Giterman, Robert ; Fish, Alexander ; Burg, Andreas et al. / A 4-Transistor nMOS-Only Logic-Compatible Gain-Cell Embedded DRAM with over 1.6-ms Retention Time at 700 mV in 28-nm FD-SOI. In: IEEE Transactions on Circuits and Systems I: Regular Papers. 2018 ; Vol. 65, No. 4. pp. 1245-1256.
Bonetti, Andrea ; Constantin, Jeremy ; Ternan, Adam et al. / A Timing-Monitoring Sequential for Forward and Backward Error-Detection in 28 nm FD-SOI. 2018 IEEE International Symposium on Circuits and Systems, ISCAS 2018 - Proceedings. Institute of Electrical and Electronics Engineers Inc., 2018. (Proceedings - IEEE International Symposium on Circuits and Systems).
Giterman, Robert ; Golman, Roman ; Shalom, Amir et al. / Live Demonstration : An 800 Mhz Gain-Cell Embedded DRAM in 28 nm CMOS Bulk Process for Approximate Computing Applications. 2018 IEEE International Symposium on Circuits and Systems, ISCAS 2018 - Proceedings. Institute of Electrical and Electronics Engineers Inc., 2018. (Proceedings - IEEE International Symposium on Circuits and Systems).
Teman, A. (Inventor) ; Noy, T. (Inventor). / Refresh Controller for FIFO Memories. Washington, DC: U.S. Patent and Trademark Office.
Golman, Roman ; Giterman, Robert ; Teman, Adam. / Configurable Multi-Port Dynamic Bitcell with Internal Refresh Mechanism. 2018 25th IEEE International Conference on Electronics Circuits and Systems, ICECS 2018. Institute of Electrical and Electronics Engineers Inc., 2018. pp. 589-592 (2018 25th IEEE International Conference on Electronics Circuits and Systems, ICECS 2018).
Ghanaatian, Reza ; Balatsoukas-Stimming, Alexios ; Müller, Thomas Christoph et al. / A 588-Gb/s LDPC decoder based on finite-alphabet message passing. In: IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 2018 ; Vol. 26, No. 2. pp. 329-340.
Giterman, Robert ; Weizman, Yoav ; Teman, Adam. / Gain-cell embedded DRAM-based physical unclonable function. In: IEEE Transactions on Circuits and Systems I: Regular Papers. 2018 ; Vol. 65, No. 12. pp. 4208-4218.
Teman, A. (Inventor) ; Giterman, R. (Inventor) ; Weizman, Y. (Inventor). / Dynamic memory physical unclonable function. Washington, DC: U.S. Patent and Trademark Office.
Giterman, Robert ; Teman, Adam ; Fish, Alexander. / A 14.3pW sub-threshold 2T gain-cell eDRAM for ultra-low power IoT applications in 28nm FD-SOI. 2018 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference, S3S 2018. Institute of Electrical and Electronics Engineers Inc., 2018. (2018 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference, S3S 2018).
Shalom, Amir ; Giterman, Robert ; Teman, Adam. / High Density GC-eDRAM Design in 16nm FinFET. 2018 25th IEEE International Conference on Electronics Circuits and Systems, ICECS 2018. Institute of Electrical and Electronics Engineers Inc., 2018. pp. 585-588 (2018 25th IEEE International Conference on Electronics Circuits and Systems, ICECS 2018).
Maltabashi, Or ; Marinberg, Hanan ; Giterman, Robert et al. / A 5-Transistor Ternary Gain-Cell eDRAM with Parallel Sensing. 2018 IEEE International Symposium on Circuits and Systems, ISCAS 2018 - Proceedings. Institute of Electrical and Electronics Engineers Inc., 2018. (Proceedings - IEEE International Symposium on Circuits and Systems).

2017

Giterman, R. (Inventor) ; Meinerzhagen, P. (Inventor) ; Burg, A. (Inventor) et al. / Transistor gain cell with feedback. Washington, DC: U.S. Patent and Trademark Office. Patent No.: US9691445B2.
Rossi, Davide ; Pullini, Antonio ; Loi, Igor et al. / Energy-Efficient Near-Threshold Parallel Computing : The PULPv2 Cluster. In: IEEE Micro. 2017 ; Vol. 37, No. 5. pp. 20-31.
Teman, A. ; Maltabashi, O. / Controlled Placement of Standard Cell Memories with Innovus Implementation System. CDNLive Israel. 2017.
Giterman, Robert ; Fish, Alexander ; Geuli, Narkis et al. / An 800 Mhz Mixed-VT 4T gain-cell embedded DRAM in 28 nm CMOS bulk process for approximate computing applications. ESSCIRC 2017 - 43rd IEEE European Solid State Circuits Conference. Institute of Electrical and Electronics Engineers Inc., 2017. pp. 308-311 (ESSCIRC 2017 - 43rd IEEE European Solid State Circuits Conference).
Giterman, Robert ; Atias, Lior ; Teman, Adam. / Area and Energy-Efficient Complementary Dual-Modular Redundancy Dynamic Memory for Space Applications. In: IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 2017 ; Vol. 25, No. 2. pp. 502-509.
Giterman, Robert ; Teman, Adam ; Fish, Alexander. / A 11.5pW/bit 400mV 5T gain-cell eDRAM for ULP applications in 28nm FD-SOI. 2017 IEEE SOI-3D-Subthreshold Microelectronics Unified Conference, S3S 2017. Institute of Electrical and Electronics Engineers Inc., 2017. pp. 1-3 (2017 IEEE SOI-3D-Subthreshold Microelectronics Unified Conference, S3S 2017).
Giterman, Robert ; Teman, Adam ; Meinerzhagen, Pascal. / Hybrid GC-eDRAM/SRAM Bitcell for Robust Low-Power Operation. In: IEEE Transactions on Circuits and Systems II: Express Briefs. 2017 ; Vol. 64, No. 12. pp. 1362-1366.
Meinerzhagen, Pascal ; Teman, Adam ; Giterman, Robert et al. / Gain-cell embedded DRAMs for low-power VLSI systems-on-chip. Springer International Publishing, 2017. 146 p.
Bonetti, Andrea ; Teman, Adam ; Flatresse, Philippe et al. / Multipliers-Driven Perturbation of Coefficients for Low-Power Operation in Reconfigurable FIR Filters. In: IEEE Transactions on Circuits and Systems I: Regular Papers. 2017 ; Vol. 64, No. 9. pp. 2388-2400.
Kazimirsky, Amit ; Teman, Adam ; Edri, Noa et al. / A 0.65-V, 500-MHz Integrated Dynamic and Static RAM for Error Tolerant Applications. In: IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 2017 ; Vol. 25, No. 9. pp. 2411-2418.
Bonetti, Andrea ; Preyss, Nicholas ; Teman, Adam et al. / Automated integration of dual-edge clocking for low-power operation in nanometer nodes. In: ACM Transactions on Design Automation of Electronic Systems. 2017 ; Vol. 22, No. 4.

2016

Teman, Adam ; Rossi, Davide ; Meinerzhagen, Pascal et al. / Power, area, and performance optimization of standard cell memory arrays through controlled placement. In: ACM Transactions on Design Automation of Electronic Systems. 2016 ; Vol. 21, No. 4.
Constantin, Jeremy ; Bonetti, Andrea ; Teman, Adam et al. / DynOR : A 32-bit microprocessor in 28 nm FD-SOI with cycle-by-cycle dynamic clock adjustment. ESSCIRC 2016: 42nd European Solid-State Circuits Conference. IEEE Computer Society, 2016. pp. 261-264 (European Solid-State Circuits Conference).
Teman, A. / FD-SOI Standard Cell Characterization with Cadence Liberate. CDNLive Israel. 2016.
Atias, Lior ; Teman, Adam ; Giterman, Robert et al. / A Low-Voltage Radiation-Hardened 13T SRAM Bitcell for Ultralow Power Space Applications. In: IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 2016 ; Vol. 24, No. 8. pp. 2622-2633.
Moyal, Lior ; Levi, Itamar ; Teman, Adam et al. / Synthesis of Dual Mode Logic. In: Integration, the VLSI Journal. 2016 ; Vol. 55. pp. 246-253.
Giterman, Robert ; Teman, Adam ; Meinerzhagen, Pascal et al. / A process compensated gain cell embedded-DRAM for ultra-low-power variation-aware design. ISCAS 2016 - IEEE International Symposium on Circuits and Systems. Institute of Electrical and Electronics Engineers Inc., 2016. pp. 1006-1009 (Proceedings - IEEE International Symposium on Circuits and Systems).
Ghanaatian, Reza ; Whatmough, Paul N. ; Constantin, Jeremy et al. / A low-power correlator for wakeup receivers with algorithm pruning through early termination. ISCAS 2016 - IEEE International Symposium on Circuits and Systems. Institute of Electrical and Electronics Engineers Inc., 2016. pp. 2667-2670 (Proceedings - IEEE International Symposium on Circuits and Systems).
Rossi, Davide ; Pullini, Antonio ; Loi, Igor et al. / 193 MOPS/mW @ 162 MOPS, 0.32V to 1.15V voltage range multi-core accelerator for energy efficient parallel and sequential digital processing. 19th IEEE Symposium on Low-Power and High-Speed Chips, IEEE COOL Chips 2016 - Proceedings. Institute of Electrical and Electronics Engineers Inc., 2016. (19th IEEE Symposium on Low-Power and High-Speed Chips, IEEE COOL Chips 2016 - Proceedings).
Giterman, Robert ; Teman, Adam ; Meinerzhagen, Pascal et al. / Single-Supply 3T Gain-Cell for Low-Voltage Low-Power Applications. In: IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 2016 ; Vol. 24, No. 1. pp. 358-362.
Teman, A. ; Constantin, J. ; Bonetti, A. et al. / DynOR: A 32-bit microprocessor in 28 nm FD-SOI with cycle-by-cycle dynamic clock adjustment. ESSCIRC Conference 2016: 42nd European Solid-State Circuits Conference. IEEE, 2016.
Teman, A. (Inventor) ; Fish, A. (Inventor) ; Atias, L. (Inventor) et al. / Complementary dual modular redundancy memory cell. Washington, DC: U.S. Patent and Trademark Office.
Edri, Noa ; Meinerzhagen, Pascal ; Teman, Adam et al. / Silicon-Proven, Per-Cell Retention Time Distribution Model for Gain-Cell Based eDRAMs. In: IEEE Transactions on Circuits and Systems I: Regular Papers. 2016 ; Vol. 63, No. 2. pp. 222-232.

2015

Teman, Adam ; Karakonstantis, Georgios ; Giterman, Robert et al. / Energy versus data integrity trade-offs in embedded high-density logic compatible dynamic memories. Proceedings of the 2015 Design, Automation and Test in Europe Conference and Exhibition, DATE 2015. Institute of Electrical and Electronics Engineers Inc., 2015. pp. 489-494 (Proceedings -Design, Automation and Test in Europe, DATE).
Giterman, Robert ; Teman, Adam ; Atias, Lior et al. / A soft error tolerant 4T gain-cell featuring a parity column for ultra-low power applications. 2015 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference, S3S 2015. Institute of Electrical and Electronics Engineers Inc., 2015. (2015 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference, S3S 2015).
Ganapathy, Shrikanth ; Teman, Adam ; Giterman, Robert et al. / Approximate computing with unreliable dynamic memories. Conference Proceedings - 13th IEEE International NEW Circuits and Systems Conference, NEWCAS 2015. Institute of Electrical and Electronics Engineers Inc., 2015. (Conference Proceedings - 13th IEEE International NEW Circuits and Systems Conference, NEWCAS 2015).
Teman, Adam ; Rossi, Davide ; Meinerzhagen, Pascal et al. / Controlled placement of standard cell memory arrays for high density and low power in 28nm FD-SOI. 20th Asia and South Pacific Design Automation Conference, ASP-DAC 2015. Institute of Electrical and Electronics Engineers Inc., 2015. pp. 81-86 (20th Asia and South Pacific Design Automation Conference, ASP-DAC 2015).
Teman, Adam ; Visotsky, Roman. / A Fast Modular Method for True Variation-Aware Separatrix Tracing in Nanoscaled SRAMs. In: IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 2015 ; Vol. 23, No. 10. pp. 2034-2042.
Teman, A. ; Burg, A. ; Bonetti, A. et al. / Dual-edge triggered clocking - how we can use it and when. CDNLive Israel. 2015.
Teman, A. ; Karakonstatis, G. ; Ganapathy, S. et al. / Exploiting application error resilience for energy savings in memories. Workshop on Approximate Computing (WAPCO). 2015.
Ganapathy, Shrikanth ; Karakonstantis, Georgios ; Teman, Adam et al. / Mitigating the impact of faults in unreliable memories for error-resilient applications. 2015 52nd ACM/EDAC/IEEE Design Automation Conference, DAC 2015. Institute of Electrical and Electronics Engineers Inc., 2015. (Proceedings - Design Automation Conference).
Teman, A. ; Bonetti, A. ; Constantin, J. et al. / Circuits and techniques for dynamic timing monitoring in microprocessors. Nanotera Annual Meeting 2015. 2015.
Bonetti, Andrea ; Teman, Adam ; Burg, Andreas. / An overlap-contention free true-single-phase clock dual-edge-triggered flip-flop. 2015 IEEE International Symposium on Circuits and Systems, ISCAS 2015. Institute of Electrical and Electronics Engineers Inc., 2015. pp. 1850-1853 (Proceedings - IEEE International Symposium on Circuits and Systems).
Teman, A. ; Burg, A. ; Bonetti, A. et al. / Automated Integration of Dual-Edge Triggered Clocking Into the Standard Design Flow. CDNLive EDMA. 2015.

2014

Atias, Lior ; Teman, Adam ; Fish, Alexander. / Single event upset mitigation in low power SRAM design. 2014 IEEE 28th Convention of Electrical and Electronics Engineers in Israel, IEEEI 2014. Institute of Electrical and Electronics Engineers Inc., 2014. (2014 IEEE 28th Convention of Electrical and Electronics Engineers in Israel, IEEEI 2014).
Giterman, Robert ; Teman, Adam ; Meinerzhagen, Pascal et al. / 4T Gain-Cell with internal-feedback for ultra-low retention power at scaled CMOS nodes. 2014 IEEE International Symposium on Circuits and Systems, ISCAS 2014. Institute of Electrical and Electronics Engineers Inc., 2014. pp. 2177-2180 (Proceedings - IEEE International Symposium on Circuits and Systems).
Teman, Adam. / Dynamic stability and noise margins of SRAM arrays in nanoscaled technologies. 2014 IEEE Faible Tension Faible Consommation, FTFC 2014. IEEE Computer Society, 2014. (2014 IEEE Faible Tension Faible Consommation, FTFC 2014).
Teman, A. (Inventor) ; Pergament, L (Inventor) ; Cohen, O (Inventor) et al. / Ultra low power memory cell with a supply feedback loop configured for minimal leakage operation. Washington, DC: U.S. Patent and Trademark Office. Patent No.: 8,773,895.
Teman, Adam ; Meinerzhagen, Pascal ; Giterman, Robert et al. / Replica technique for adaptive refresh timing of gain-cell-embedded dram. In: IEEE Transactions on Circuits and Systems II: Express Briefs. 2014 ; Vol. 61, No. 4. pp. 259-263.
Fish, A. ; Atias, L. ; teman, a. / Low Power Radiation Hardened SRAM - Challenges and Leading Solutions. IEEEI 2014. 2014.
Dagan, Hadar ; Shapira, Aviv ; Teman, Adam et al. / A low-power low-cost 24 GHz RFID tag with a C-Flash based embedded memory. In: IEEE Journal of Solid-State Circuits. 2014 ; Vol. 49, No. 9. pp. 1942-1957.

2013

Dagan, Hadar ; Teman, Adam ; Pikhay, Evgeny et al. / A low-power DCVSL-like GIDL-free voltage driver for low-cost RFID nonvolatile memory. In: IEEE Journal of Solid-State Circuits. 2013 ; Vol. 48, No. 6. pp. 1497-1510.
Teman, Adam ; Mordakhay, Anatoli ; Fish, Alexander. / Functionality and stability analysis of a 400 mV quasi-static RAM (QSRAM) bitcell. In: Microelectronics Journal. 2013 ; Vol. 44, No. 3. pp. 236-247.
Meinerzhagen, Pascal ; Teman, Adam ; Fish, Alexander et al. / Impact of body biasing on the retention time of gain-cell memories. In: Journal of Engineering. 2013 ; Vol. 2013, No. 8. pp. 19-22.
Atias, Lior ; Teman, Adam ; Fish, Alexander. / A 13T radiation hardened SRAM bitcell for low-voltage operation. 2013 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference, S3S 2013. IEEE Computer Society, 2013. (2013 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference, S3S 2013).
Teman, A. (Inventor) ; Pergament, L (Inventor) ; Cohen, O (Inventor). / Ultra low power SRAM cell circuit with a supply feedback loop for near and sub threshold operation. Washington, DC: U.S. Patent and Trademark Office. Patent No.: 8,531,873.
Meinerzhagen, Pascal ; Teman, Adam ; Giterman, Robert et al. / Exploration of sub-VT and near-VT 2T gain-cell memories for ultra-low power applications under technology scaling. In: Journal of Low Power Electronics and Applications. 2013 ; Vol. 3, No. 2. pp. 54-72.
Vaknin, Afik ; Yona, Ortal ; Teman, Adam. / A Double-Feedback 8T SRAM bitcell for low-voltage low-leakage operation. 2013 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference, S3S 2013. IEEE Computer Society, 2013. (2013 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference, S3S 2013).

2012

Teman, Adam ; Yadid-Pecht, Orly ; Fish, Alexander. / Leakage reduction in advanced image sensors using an improved AB 2C scheme. In: IEEE Sensors Journal. 2012 ; Vol. 12, No. 4. pp. 773-784.
Meinerzhagen, P ; Teman, A ; Mordakhay, A et al. / A sub-V T 2T gain-cell memory for biomedical applications. Subthreshold Microelectronics Conference (SubVT). IEEE, 2012.
Teman, Adam ; Mordakhay, Anatoli ; Mezhibovsky, Janna et al. / A 40-nm sub-threshold 5T SRAM bit cell with improved read and write stability. In: IEEE Transactions on Circuits and Systems II: Express Briefs. 2012 ; Vol. 59, No. 12. pp. 873-877.
Dagan, Hadar ; Teman, Adam ; Fish, Alexander et al. / A GIDL free tunneling gate driver for a low power non-volatile memory array. Paper presented at 2012 IEEE International Symposium on Circuits and Systems, ISCAS 2012, Seoul, Korea, Republic of.4 p.
Dagan, Hadar ; Teman, Adam ; Fish, Alexander et al. / A low-cost low-power non-volatile memory for RFID applications. Paper presented at 2012 IEEE International Symposium on Circuits and Systems, ISCAS 2012, Seoul, Korea, Republic of.4 p.
Teman, A. ; Fish, A. / SRAM stability in the nanoscale era. CDNLive Israel. 2012.
Spivak, Arthur ; Teman, Adam ; Belenky, Alexander et al. / Low-voltage 96 dB snapshot CMOS image sensor with 4.5 nW power dissipation per pixel. In: Sensors. 2012 ; Vol. 12, No. 8. pp. 10067-10085.
Mezhibovsky, Janna ; Teman, Adam ; Fish, Alexander. / State space modeling for sub-threshold SRAM stability analysis. Paper presented at 2012 IEEE International Symposium on Circuits and Systems, ISCAS 2012, Seoul, Korea, Republic of.4 p.
Edri, Noa ; Fraiman, Sharon ; Teman, Adam et al. / Data retention voltage detection for minimizing the standby power of SRAM arrays. 2012 IEEE 27th Convention of Electrical and Electronics Engineers in Israel, IEEEI 2012. 2012. (2012 IEEE 27th Convention of Electrical and Electronics Engineers in Israel, IEEEI 2012).
Meinerzhagen, Pascal ; Teman, Adam ; Mordakhay, Anatoli et al. / A sub-VT 2T gain-cell memory for biomedical applications. 2012 IEEE Subthreshold Microelectronics Conference, SubVT 2012. 2012. (2012 IEEE Subthreshold Microelectronics Conference, SubVT 2012).
Teman, Adam ; Meinerzhagen, Pascal ; Burg, Andreas et al. / Review and classification of gain cell eDRAM implementations. 2012 IEEE 27th Convention of Electrical and Electronics Engineers in Israel, IEEEI 2012. 2012. (2012 IEEE 27th Convention of Electrical and Electronics Engineers in Israel, IEEEI 2012).

2011

Teman, A. ; Fish, A. ; Mezhibovsky, Janna. / Low voltage logic and SRAM design. ChipEx2011. 2011.
Mezhibovsky, Janna ; Teman, Adam ; Fish, Alexander. / Low voltage SRAMs and the scalability of the 9T Supply Feedback SRAM. Proceedings - IEEE International SOC Conference, SOCC 2011. 2011. pp. 136-141 (International System on Chip Conference).
Schwartz, I ; Teman, A ; Dobkin, R et al. / Near-threshold 40nm Supply Feedback C-element. Quality Electronic Design (ASQED), 2011 3rd Asia Symposium on. IEEE, 2011.
Teman, Adam ; Pergament, Lidor ; Cohen, Omer et al. / A 250 mV 8 kb 40 nm ultra-low power 9t supply feedback SRAM (SF-SRAM). In: IEEE Journal of Solid-State Circuits. 2011 ; Vol. 46, No. 11. pp. 2713-2726.
Spivak, Arthur ; Teman, Adam ; Belenky, Alex et al. / Power-performance tradeoffs in wide dynamic range image sensors with multiple reset approach. In: Journal of Low Power Electronics and Applications. 2011 ; Vol. 1, No. 1. pp. 59-76.
Schwartz, Idan ; Teman, Adam ; Dobkin, Rostislav et al. / Near-threshold 40nm supply feedback C-element. Proceedings of the 3rd Asia Symposium on Quality Electronic Design, ASQED 2011. 2011. pp. 74-78 (Proceedings of the 3rd Asia Symposium on Quality Electronic Design, ASQED 2011).
Mezhibovsky, Janna ; teman, a. ; Fish, A. / Low voltage SRAMs and the scalability of the 9T supply feedback SRAM. SOC Conference (SOCC), 2011 IEEE International. IEEE, 2011.
Teman, Adam ; Pergament, Lidor ; Cohen, Omer et al. / A minimum leakage quasi-static RAM bitcell. In: Journal of Low Power Electronics and Applications. 2011 ; Vol. 1, No. 1. pp. 204-218.

2010

Teman, Adam ; Fish, Alexander. / Sub-threshold and near-threshold SRAM design. 2010 IEEE 26th Convention of Electrical and Electronics Engineers in Israel, IEEEI 2010. 2010. pp. 608-612 (2010 IEEE 26th Convention of Electrical and Electronics Engineers in Israel, IEEEI 2010).

2009

Teman, A. ; Yadid-Pecht, Orly ; Fish, A. / An Improved AB 2 C scheme for leakage power reduction in image sensors with on-chip memory. IEEE Sensors. IEEE, 2009.
Teman, Adam ; Yadid-Pecht, Orly ; Fish, Alexander. / An improved AB2C scheme for leakage power reduction in image sensors with on-chip memory. IEEE Sensors 2009 Conference - SENSORS 2009. 2009. pp. 193-196 (Proceedings of IEEE Sensors).
Fisher, Sagi ; Teman, Adam ; Vaysman, Dmitry et al. / Ultra-low power subthreshold flip-flop design. 2009 IEEE International Symposium on Circuits and Systems, ISCAS 2009. 2009. pp. 1573-1576 (Proceedings - IEEE International Symposium on Circuits and Systems).

2008

Teman, Adam ; Fisher, Sagi ; Sudakov, Liby et al. / Autonomous CMOS image sensor for real time target detection and tracking. 2008 IEEE International Symposium on Circuits and Systems, ISCAS 2008. 2008. pp. 2138-2141 (Proceedings - IEEE International Symposium on Circuits and Systems).
Fisher, S ; Teman, A ; Vaysman, D et al. / Digital subthreshold logic design-motivation and challenges. Electrical and Electronics Engineers in Israel, 2008. IEEEI 2008. IEEE 25th Convention of. IEEE, 2008.
Fisher, Sagi ; Teman, Adam ; Vaysman, Dmitry et al. / Digital subthreshold logic design - Motivation and challenges. 2008 IEEE 25th Convention of Electrical and Electronics Engineers in Israel, IEEEI 2008. 2008. pp. 702-706 (IEEE Convention of Electrical and Electronics Engineers in Israel, Proceedings).